6. Output Generation
Due to the increasing number of document outputs required for PCB designs the following checklist has been produced to define them all. Please note that not all outputs are required for every PCB so it is the responsibility of the PCB designer to determine which are / are not valid.
| Output | Supplied to | Comments |
|---|---|---|
|
PCB Mechanical check files, comprising of the following:- Export “IDF Board” files (*.brd & *.pro) for common library based designs. Export a DXF file. For legacy designs not based on the common library the below should be supplied:- Top layer copper (*.GTL) & legend (*.GTO), Bottom layer copper (*.GBL) & legend (*.GBO) {if components are present on solder side}, PCB outline, mechanical-1 layer (*.GM1), PCB special instruction mechanical layers i.e. countersinks etc. (if applicable), Drill drawing (*.GD1) & drill guide (*.GG1) |
Mechanical |
Common library based designs will have 3D models of components available in CircuitWorks so just IDF files are required from Altium. A single DXF file can be generated that contains all the relevant layers. Required to 3D model & verify the layout plus generate (if applicable) the front panel label. |
|
PCB Fabrication outputs, comprising of the following:- Gerber files, NC drill files, Request for quotation document, Internal construction (PCB build) document. |
PCB fabricators | Typically obtain quotations from 2-3 suppliers but this will vary on a board to board basis. |
|
PCB solder paste stencil outputs, comprising of the following:- Top layer paste mask (*.GTP), Bottom layer paste mask (*.GBP) {if applicable}, Aperture file (*.APR). In addition, email a PDF of mask image(s) and include stencil parameters & PO number, there is a template for this info. |
Paste stencil fabricator | For PCBs with components on both sides a single stencil is required per image. |
|
Design (internal use) outputs, comprising of the following:- Schematic PDF, PCB layout PDF with one sheet per Gerber layer and where suitable scaled 1:1, Combined schematic & PCB layout PDF, BOM, Wiring / configuration (links, switches etc.) information, Internal wiring schematic PDF for LXI units (if applicable). ODB++ files for use with the pick & place machine. |
NPI | For distribution to SMT team, entry into X3 (BOM) and general use inside Pickering. |
|
Software outputs, comprising of the following:- Register level info spreadsheet detailing all configurations, Block diagram PDF to determine how the module functions, Wiring / configuration information. |
Software | |
|
Literature outputs (where applicable), comprising of the following:- Software bit / sub-unit / relay usage*, Wiring / configuration information, Block diagram, Excel sheet based connector pin out, LXI internal schematics. |
Literature | Due to commercial reasons the applicability of the various outputs may vary project to project. |
“*” = Some designs may want to limit customer access to these details i.e. efficient matrix cards so the information may only be present in a limited availability repair manual.
Once all the applicable outputs have been produced they should be backed up to the following Pickering servers:-
| Location | Items to be backed up |
|---|---|
| {Knowledge tree server}\PCB Dev & Schedule\PC {PCB number & revision} {brief description} |
All design documents |
| {Knowledge tree server}\ PI-Gerbers - All current revisions \{PCB number & revision} |
PCB Fabrication outputs |
If an existing PCB design is revised the previous version of design data should be moved to the below locations and the latest design copied to the locations detailed in the previous table:-
{Knowledge tree server}\PCB Dev & Schedule\Dev & Schedule Archive\PC {PCB number & revision} {brief description}
{Knowledge tree server}\PI-Gerbers - Old and Archived Revisions do not use\{PCB number & revision}
To ease the identification files a naming structure should be used throughout the project, this can be a personal preference but an example is {Module top level number} {Module description} {PCB number} {PCB revision} {File description} i.e. using the 40-566B BRIC mothercard RFQ schematic as an example would be “40-566B BRIC Mother 1048 r0_0 RFQ.SchDoc”.
For the PCB layout itself the filename should remain short as it will be used in the naming of the Gerber files, the structure should be “PCB {PCB number} {PCB revision}.PcbDoc”, using the previous example would result in “PCB 1048r0.PcbDoc”.