Each PCB (mothercard only in a mother / daughter module) is to have CE, WEEE and 33MHz logos. There are “standard” positions for these identifiers and ideally they should be located as indicated by the PCB footprints. If holes are present in the CE & WEEE logo position it is permissible to move the logos ; the preference would be to have them located somewhere in the bottom left hand side corner of the PCB on the solder side legend.

PCB designs must comply with the 2.5mm gap requirement between the PCB top & bottom edges and any components as defined in the PXI specification.

As per the Compact PCI specification the maximum component height should be 13.71mm on the component side and {3.12mm minus the PCB thickness} on the solder side; under certain circumstances these rules can be violated but the implications will need to be researched.

It is not permissible to route on the top layer in the gap between pins A-F11 & A-F15 of the PXI connector. The reason being that some PXI connectors have the ground shield extending to the PCB surface and there is the risk that the metal edge could short out on any traces.

For each PXI power rail (+/-12V, +5V & +3.3V) a 100nF ceramic capacitor is to be fitted even if the rail is not used on the module, as defined in the PXI specification. For rails that are used an additional 10uF ceramic capacitor is to be fitted. The capacitors should be located as close to the PXI connector as possible.